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SGI RASC Implementation
Mitrion BLAST early preview
This contains the Mitrion-C code for BLAST as well as a modified version of NCBI BLAST 2.2.13 for replacing the calculation core with calls to the FPGA.File legend
mitc/blast-unrolled.mitc - The Mitrion implementation of stage 1 & 2 of BLAST mitc/bloom/* - VHDL Plugins for generating H3 Hash functions used by the blast mitrion code. ncbi/ - The patched NCBI blast source code.Compiling
Adjust the paths and the settings HOST_API and MODE in ./ncbi/make/mitrion-settings.inc to choose between rasclib or mithal and run ./ncbi/make/makedis.csh to compile.FPGA
If you have a valid Mitrion SDK with hardware generation, you can use the Mitrion SDK to generate a bitfile from the mitc source, register it under an algorithm name, for example 'blast'
> devmgr -a -n blast -b mitrion_xst.bin -c bitstream.cfg -s core_services.cfgSimulation
Build the BLAST host in mithal simulation mode and start a simulation server. Then run blast as usual. Note that the simulation is currently very slow, so you will probably not want to run a real query against a real database.Environment variables
BLAST_FPGA_DEBUG=<0/1> - Set to 1 to enable debug messages BLAST_BITSTREAM=<name> - the name of the bitstream to use. This should be the same as was used to register the bitstream. When running in the simulator, this should be the name of the mitc source file. BLAST_FPGAS=<n> - The number of FPGA:s to scale the search across. Set to 1 when running in the simulator. RASCLIB_IO=<DIRECT/BUFFERED> - The I/O method rasclib should use. (recommended: DIRECT). Only for running in hardware.
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